Memory Depth and Data Length -
The choices of memory depth and data length and the number of frequency steps that you have will have an effect on the output of your waveform. First, recall that the memory depth must be more or equal to the data length and the data length should be more or equal to the number of frequency steps so that we have the following necessary condition:
where DL is the Data Length and MD is the Memory Depth
The above must be satisfied in order to have proper chirping. The DSM stores frequencies as frequency words. There are a total of 524,288 memory addresses available, each able to store one 32-bit frequency word. The DSM stores these frequencies in special ways depending on the data length and memory depth parameters. An example will help you see exactly what is going on.
Assume that you have specified 10 frequency steps in your chirp and you have set Memory Depth = 16 and Data Length = 12 (satisfies equation above). By setting those parameter values, you have made 16 memory addresses available (from the Memory Depth value) but only 12 of those memory addresses will be made available for chirping (Data Length value). What the DSM does is it stores the 10 user specified frequencies in the first 10 memory addresses but since there are still two more memory addresses available for chirping (Data Length – frequency steps), it copies the first 2 frequencies again in the remaining memory addresses made available by the Data Length. There are still 4 more memory addresses available (Memory Depth – Data Length) so the remaining 4 memory addresses will be stored with the user specified starting frequency. The images below illustrates our example:
When you run the DSM with these settings, the board will run through all 16 memory addresses in the Memory Depth cycle then start over again.
In the discussion below we often speak in terms of cycles. There are three cycles to be aware of: Memory Depth cycle, Data Length Cycle, and frequency chirp cycle. One Memory Depth cycle means running through all of the memory addresses made available by the Memory Depth parameter so in the above example one Memory Depth cycle would be 16 memory addresses. One Data Length cycle means running through all of the memory addresses made available by the Data Length parameter so in the above example, one complete Data Length cycle would be 12 memory addresses. One chirp cycle means running through every frequency in the user defined chirp so in the above example one complete chirp cycle would be 10 memory addresses since there are 10 frequency steps.
There are six different ways you can manipulate the output with the Memory Depth and Data Length parameters.
Frequency steps equation:
In one Memory Depth cycle, the DSM will run through all of the desired frequencies exactly once. So for example if you had 64 frequency steps, and Data Length = Memory Depth = 64 then all of the 64 frequencies will be output once during each Memory Depth cycle.
In one Memory Depth cycle, the DSM will run through all of the desired frequencies n times. The image above is when n = 2. So for example if you had 32 frequency steps and Data Length = Memory Depth = 64, then each frequency in the chirp will be output twice during each Memory Depth cycle.
In one Memory Depth cycle, the DSM will run through one chirp cycle and repeat a fraction of the chirp cycle again until the start of the new Memory Depth cycle. So for example if you had 50 frequency steps and Data Length = 64 and Memory Depth = 64, then all 50 frequencies will be output during the first chirp cycle but only the first 14 frequencies will be output during the next chirp cycle since you have reached the end of the Data Length and Memory Depth cycles.
NOTE:
The next three outputs are not available if Data Length Enabled is checked in the Memory Depth section of the Waveform window. All outputs will resemble either waveform #1, #2 or #3 above since Memory Depth will always be equal to the Data Length.
In one Memory Depth cycle, the DSM will run through one chirp cycle and after the cycle will only output the starting frequency until the start of the next Memory Depth cycle. So for example if you had 30 frequency steps and Data Length = 30 and Memory Depth = 64; then all 30 frequencies of the chirp cycle will be output but for the next 34 memory addresses, the DSM will only output the starting frequency.
In one Memory Depth cycle, the DSM will run through n chirp cycles and after the nth chirp cycle will only output the starting frequency until the start of the next Memory Depth cycle. The image above is for when n = 2. So for example if you had 25 frequency steps and Data Length = 50 and Memory Depth = 64, then for each Memory Depth cycle, each chirp cycle will be output twice consecutively followed by 14 memory addresses of the starting frequency.
In one Memory Depth cycle, the DSM will run through one chirp cycle and repeat a fraction of the chirp cycle again until the end of the Data Length cycle is reached after which only the starting frequency is output until the DSM reaches the end of the Memory Depth cycle. So for example if you had 40 frequency steps and Data Length = 50 and Memory Depth = 64, then all 40 frequencies of the chirp cycle will be output first. Then the first 10 frequencies of the chirp cycle will be output again after which only the starting frequency will be output until the end of the Memory Depth cycle which is the reminder 14 memory addresses.