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Operation Theory -

The conceptual architecture is shown in the following:

Hardware — The DST501 consists of two Euvis DS852 high-speed DDS, a QDR SRAM (Cypress CY7C1315), an ASIC memory controller, and an enhanced 8051 microcontroller (Cypress CY7C68013A) with external RAM and EEPROM. The key front-end component DS852 features a 2.5 GHz clock rate, 11-bit amplitude and 13-bit phase resolutions. It takes 24 single-ended frequency word data as inputs. The two DDS outputs are connected to a direct modulator which modulates the baseband siganls up to the carrier frequency. Please note that the 24-bit words to both DDS are identical but each DDS can be selected as either the in-phase or quadrature signal.

The chirping waveform data (24-bit frequency words) are stored in the QDR SRAM, which provides 450K x 24-bit memory depth. The ASIC memory controller performs reading/writing controls and data transfers. The microcontroller has an integrated USB 2.0 transceiver, a series interface engine (SIE) and an enhanced 8051 microprocessor, which provides a user friendly interface for the host PC or existing systems and general-purpose controls.

Software — The companion API (Application Programming Interface) performs all the hardware controls and handles the data transfers on the user end. The gray-color blocks represent user-invisible kernel layers in the operations. All the user's operations/commands are executed virtually onto the QDR RAM and DDS on the DST501 even though physically the bulk of the instructions are transferred via the USB bus and executed by the kernel layers. This virtual connection between the API and RAM provides a clean and simple interface for users to develop their own application software without the trivial knowledge of the low-level drivers, the USB interface, the firmware, and the control hardware.

The API consists of a set of callable routines in Microsoft Visual C++ library. Users can develop their own application software to operate the DST501 in their own manner or modify the existing system to adopt the DST501 into their end products. The API consists of three groups of functions:

1. Waveform generation: The built-in waveform generator takes user's parameter inputs, computes the digital codes, and downloads the codes onto the RAM accordingly. The built-in waveforms include linear chirping CW FM waveforms which have frequency updates at each 8 clock cycles.
2. Waveform control: The waveform control function downloads the digital data onto the RAM in the writing phase, controls the DDS, and provides the RAM cyclic addresses in the reading phase. It also controls the cyclic depth.
3. Import/Export waveforms: The API provides routines to import user-defined waveform data in various formats, such as ASCII format and MATLAB compatible ASCII format. On the other hand, all the built-in waveforms can be exported to files for analysis.

Beside the API, a Windows-XP GUI provides users convenient ways to control and operate the DST501. The GUI features built-in linear chirping waveforms, which can be customized to meet the most chirping needs. Users can also utilize GUI to transport their own waveforms onto the DST501.